PollEx PCB DFM 
Take off for Design Innovation!
PollEx DFM is rule based PCB verification software for manufacturing engineer.
And PollEx PCB, it is the based module of this product, and it can support to multiple ECAD database. So that it gives a help to minimize the defective fact in actual manufacturing process.
Raise the efficiency of time and cost from design to manufacturing stage.
It provides features to reduce expense and time loss which follows in mass production cycle. Because it indicates for each item against each manufacturing error fact on PCB design and it provides result database on actual error point. Consequently it will be able to expect a process ratio synergistic effect and a defective ratio decrease effect.
[Running structure of PollEx DFM]
Features
- User-optimized environment for setting multiple rules.
- Containing all intelligence information from ECAD database using PollEx PCB.
- Support verification of assembly and fabrication against conceptual design process to physical design.
- Provide customized functions by actual requirement from field engineers.
- Can manage checking history as report with screenshot of real error point.
- Support efficient usage by Running Core+Pre/Post Processor.
Major checking items
Over 120+ categories
Spacing optimization for component
Component Spacing, Reverse Placement Spacing, Clinch Spacing, Min Pad Spacing in Component
Mark existence for manufacturing machine
First Pin Mark, IC Visual Mark, Center Mark, Polarity Mark, Pin Count Mark, Fiducial Mark, PCB Mark, SMT Direction Mark
Adequate condition for manufacturing environment
Prefix Check, Pair Component, Silk to Silk, Reference Name Silk, Reference Name Ordering, Pin Arrangement, Silk Print Between Two Pins, Variant Pad Shape, Edge Pin Size, OSP, Nearest Comp Silk, Specific Area, Pad Size by Pin Pitch
Annular ring optimization
Dip Annular Ring, Via Annular Ring
Placement optimization
Component Count, Component On Component, Component Placement, Prohibited Component, Placement At Reverse Side, Standard Component
Tooling
Screw, Pin Mark Match Check, Hole Mark Match Check, Pad Match Check, Board Outline Match Check
Drill condition
Drill Size of Hole, Drill Size of Pin, Drill Size of Via, Under Hole/Via, Hole Distance, Gas Hole, Drill Scan, Similar Hole Size
Considering condition of Pin Pad
Hole Through Pad, Silk On Pad, Dummy Pad, Via Spacing, Teardrop, Via S/R Spacing, SR Pad, Remove Copper, Thermal Pad, Copper Connected Pad, Minimum Via Land Size, Via Over Stack
Considering condition of PCB space
Board Spacing, PCB Outline Spacing, Guide Hole, Guide Line, Cutting Region, PCB Outline Sharp Angle, Array Board Size Check, Label Box, Missing Hole, Min Silk Width, Jig Hole, Routing Slit, SM Violate, Dummy PCB, Board Origin Offset, V-Cut, Sub Board MisArrangement, Data Existence, Ground Wall
Net verification
Connected Pad, Lines Between Two Pins, Net to Net, Min Width, Pad to Net, 1Pin Nets, Crack Pattern, Object to Object, Unrouted Net, Keep Out pattern
FPCB
Bending Area, Stiffener, Round Pattern, Bonding Pad, Silver Paste, Min Via Spacing, Manufacturing Process, Coverlay, Bonding Area
Miscellaneous for specific product
LED, Text Existence, Key Pad, Dome Sheet Guide Hole, TCP Bonding Mark, TCP Dummy Pad, TCP Pad, TCP Align Hole, FPC Dummy Pad
Considering BGA component
Spacing from other object, Underfill
